Mihai Sanduleanu received his MSc, MEE and PhD degrees from the Technical University of Iasi, Romania; Eindhoven University of Technology, The Netherlands; and the University of Twente, The Netherlands; in 1990, 1993 and 1999, respectively. Mihai Sanduleanu received the Philips Foundation MSc and PhD Fellowship in 1993 and 1994 respectively.
From 1999 to 2000, he was with Philips Semiconductors, Nijmegen, The Netherlands, and he worked on fiber optic communication circuits. He then moved to Philips Research Eindhoven, The Netherlands, and was involved in fiber optic interface circuits, radio frequency (RF) interconnected chip (IC) design, mm-waves transceiver design and ultra-low power radios (2000-2007). While at Philips Research, Dr. Sanduleanu was Adjunct Professor in the Microelectronics group of Eindhoven University of Technology. In 2008, he spent six months at Inter-university Microelectronics Center (IMEC), Leuven, Belgium, conducting research on 60GHz transceiver design and THz electronics. From 2008 to 2013, Dr. Sanduleanu conducted research at the IBM T.J. Watson Research Center, Yorktown Heights, New York, in mm-wave transceivers for communication, imaging and radar, high-speed analog-to-digital converters for wired/wireless communication systems and ultra-low power radios.
Dr. Sanduleanu is currently Associate Professor at Khalifa University of Science and Technology. His areas of expertise include wireless transceiver design for RF/mm-waves/THz communication, THz electronics, high speed communication circuits for serial input and output, high speed analog-to-digital converters, phased-array systems, imaging, fiber optic interface IC, ultra-low power radios, data and clock recovery and phase locked loop (PLL), high accuracy/low-power analog/mixed-signal circuits and systems, system on chip (SoC) design, on-chip sensors and actuators for autonomous transceivers (wired/wireless), high-speed digital circuits and systems, electromagnetics and antenna design.
Dr. Sanduleanu has authored/co-authored four books and more than 87 papers in international conferences and journals. He also holds 53, granted US patents. Dr. Sanduleanu served as Associate Editor for IEEE Transactions on Circuits and Systems and he serves in the Editorial Board of the Analog Integrated Circuits and Signal Processing Journal and Electronics and Signal Processing
Vital signs monitoring using LFMCW Radar techniques can provide remote monitoring of patients without wires. Going to higher frequencies like mm and sub mm-Waves has the advantage of better micro-doppler resolution and better heart-rate accuracy. Another advantage is the size of the antenna that can fit on-chip. Besides, the antenna efficiency is higher as less power is absorbed in the substrate thus, enhancing the radiated power in the air. At 160GHz, both transmit and receive antennas can be integrated on chip eliminating critical, external connections operating at 160GHz. The proposed Vital signs monitoring IC has a small footprint with the only high frequency connections to PCB running below 5GHz. By choosing the RF carrier at 160GHz the IF bandwidth can be large, providing better range resolution.The. paper presents a vital signs monitoring IC frontend that consists of a transmitter with integrated PA and antenna and a receiver that consists of an integrated antenna, LNA, I/Q downconverter and a PLL shared by Rx and Tx as well.
The project “Non-invasive Glucose level Detection IC” is related to the development of an integrated IC in 65nm CMOS technology from Global Foundries. The existing solutions use blood samples (invasive methods) to quantify the glucose level in the blood. As collecting blood samples can be painful and subject to infections, research institutions are looking for non-invasive solutions based on antennas and changes in the resonant frequency. However, the research is in its infancy and all the papers are focusing on electromagnetics and the antenna and neglecting the sensing of the resonant frequency which mostly is done by a Vector Network Analyzer.
In order to provide a practical solution, one needs to miniaturize the concept and add the reading part to the complete design. As the end users are the home patients, price plays a role itself. We are proposing an end-to-end solution for measuring the glucose level that has a small footprint and low cost. The idea is to replace the invasive device that measures the glucose level. The method is explained below:
An external antenna realized on a ceramic material at 120 GHz will have its upper part exposed. Touching with your finger on the surface, the antenna will change its characteristic impedance Z0 depending on the glucose level in the blood. The integrated circuit senses the change in S11 (input return loss) and therefor it senses the change in characteristic impedance and the glucose level. An integrated 10-bit Analog to Digital Converter (ADC) will digitize the analog value and the digital value will be sent to a digital engine that will provide the value of glucose in the blood. To minimize the footprint, the antenna and the IC will work at 120GHz (sub mm-waves).
The project contains different parts/disciplines: An external antenna, An RF Circuit sensing the changes in characteristic impedance of the antenna, a 10-bit SAR ADC and a digital engine (state machine) for calculating the glucose level.
Silicon area, power consumption, range of operation, and timing uncertainty are among the metrics that dictate the choices of a PLL architecture as well as implementation strategies. For a given jitter performance, analog implementations require a loop filter with a big capacitor making the overall PLL size large. On the other hand, a digital PLL provides an alternative with significantly smaller silicon area. Moreover, a digital implementation results in a low power implementation. In addition, a wide range of operation is essential to run the chip at different frequencies. This enables reusing the PLL in different designs,
avoiding PLL redesign. In this work, a compact, low power, and wide tuning range All Digital PLL (ADPLL) has been implemented. The Frequency-Locking Loop (FLL) is a feedback loop which forces the frequency difference between the input signal and the oscillator output down to the capture range of the phase-locking loop. Similarly, the Phase-Locking Loop (PLL) forces the phase error between input signal and the oscillator output to zero.
The capture range of the phase detector (PD) is a few percent of the reference clock frequency which is much smaller than the required tuning range of the ADPLL. Consequently, a frequency-locking mechanism is required to pull the frequency of the local oscillator close to the operating frequency such that the PD with its narrow pull-in range can assume responsibility. The choice of the frequency detector architecture used is based on the requirements that it should be easily interfaced with digital loop filters and allow a wide range of operation. A digitized Phase and Frequency Detector (PFD) with Successive Approximation Register (SAR) algorithm is employed to generate the appropriate digital control word to switch the required current value.
Associate Editor of the “Analog Integrated Circuits & Systems Journal”
Associate Editor for IEEE Transactions on Circuits and Systems (2012-2013)
TPC Member of The 16th IEEE Mediterranean Microwave Symposium (MMS’2016)
TPC Member of The 17th IEEE Mediterranean Microwave Symposium (MMS’2017)
TPC Member of The 2016, 29th International Conference on VLSI Design and 2016, 15th International Conference on Embedded Systems (VLSID)
TPC Member of The 2017, 30th International Conference on VLSI Design and 2017, 16th International Conference on Embedded Systems (VLSID)
17TH MEDITERRANEAN MICROWAVE SYMPOSIUM (MMS2017)
NOVEMBER 28-30, 2017 – MARSEILLE, FRANCE http://www.fresnel.fr/mms2017/IMG/pdf/call_for_paper_mms_2017-2.pdf
TPC member of the IEEE VLSI SOC 2017 Conference
TPC member of the IEEE Custom Integrated Circuits Conference (2011-2012)
Reviewer for IEEE Transactions on VLSI Technology
Reviewer IEEE Transactions on Circuits and Systems I
Reviewer Transactions on Circuits and Systems II
Reviewer for IEEE Journal of Solid States
Reviewer for IET Circuits, Devices and Systems
Organization of Special Sessions/Tutorials
Organizing Committee of IEEE VLSI SOC 2017, Conference, Abu Dhabi, UAE
Chairman of the Special Session “Multifunctional Circuits and Systems for Future Generations of Wireless Communications” at International Symposium on Circuits and Systems, May 2007, New Orleans, USA.
Tutorial “Energy Efficiency and the Internet of Things: From Circuits to Protocols” on 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), October 2016, Abu Dhabi, UAE.
Summary of Major Research Contributions to the field
54 granted US patents related to the research field / 85 papers published in IEEE Journals and Conferences/ 21 Invited papers / Citation h-index of 22, i10-index of 46
5-Books or book chapters
21 graduated MSc students and 7 PhD students
7 Philips Research Awards and 5 IBM Research Awards /
TPC member of the IEEE Custom Integrated Circuits Conference (2012), TPC member of the 29th International Conference on VLSI Design, 2016, Organizer and TPC Member of IEEE VLSI SOC 2017 Conference, TPC Member of The 17th IEEE Mediterranean Microwave Symposium (MMS’2016), TPC Member of The 17th IEEE Mediterranean Microwave Symposium (MMS’2017)
Associate Editor for IEEE Transactions on Circuits and Systems (2012-2013)
Recipient of IBM O-1 visa program (individuals with exceptional abilities) for three years
IBM liaison for the SRC THz program working with different US universities
“Power, accuracy and noise aspects in CMOS mixed-signal design” PhD Dissertation
“W-Band Scalable Phased-Array Transceiver” achieved highest integration at W-Band
“A Near-Field mm-Wave Imaging Technique” First Near-Field Skin Cancer Detection Device
“A 60GHz, Linear, Direct Down-Conversion Mixer with mm-Wave Tunability in 32nm CMOS SOI” State of Art Performance in terms of linearity
“Flexible, Ultra-Thin RFID-tag” World’s first flexible RF tag
“e-Cubes European Project” 3D Integrated Micro/Nano Modules for Easily Adapted Applications
“17GHz Radio Transceiver” First 1nJ/bit radio transceiver
“A 4GS/s, 8.45 ENOB and 5.7fJ/Conversion, Digital Assisted, Sampling System in 45nm CMOS SOI” State of Art Performance (Linearity and energy/conversion)
“A 3.2GS/s 4.55b ENOB Two-Step Subranging ADC in 45nm SOI CMOS” State of Art Performance: Lowest Energy/conv. step above 2GS/s
“mm-Wave Receiver” First 60GHz Integrated Receiver in 90-nm CMOS
Post Doc for Non-invasive Glucose Detection IC
Post Doc for Vital Signs Detection IC