5G and 6G networks, data centers, edge computing and cloud for real time information transfer and computing require ultra-large bandwidth, low latency and low consumption. As chip-to-chip and board-to-board interconnect bandwidth increases, co-integration of ASICs and optical engines is the next step up in terms of integration density, cost-effectiveness, and energy efficiency. To reduce current values of latency, energy cost per bit, and power consumption of current PAM4 modulated 100Gb/s transceivers, high speed >100Gb/s error-free NRZ transceivers have to be developed. Achieving >70GHz bandwidth together with large optical modulation amplitude would overcome the use of the FEC and DSP of the current modules. Graphene has outstanding photonic properties in terms of bandwidth, extinction ratio and insertion loss to challenge the above bandwidth and modulation efficiency targets. In fact, Graphene photonics can enable 100Gbaud large optical extinction ratio modulation amplitude NRZ and direct detection with no postprocessing electronics that permits the scalability of optical interconnections in data centres and wireless networks. Existing pluggable module solutions at 100Gb/s use PAM4 (e.g., 400G-DR4) modulation format operates at 50GBaud. Better performing co-packaged versions of this EO interface are still at the research stage. CamGraPhIC develops the Graphene Integrated Photonics platform based on passive silicon photonics to realize a compact, high-density, energy-efficient Graphene electro-absorption modulator (EAM) and photodetector arrays based on binary modulation at 100Gbaud channel for co-package integration. To make this technology ready for use, we develop the co-integration of photonic and electronic integrated circuits on a standard substrate for co-package with commercial ASIC.

Figure 1: High-mobility CVD-grown Graphene Crystals (a), Silicon Photonics (SOI) structures with transferred Graphene Crystals (b).