Bringing Analog to the Digital Age of Edge Computing

22 Feb 2022

With more devices connected to the internet, there’s a need for new computing platforms to speed up data processing closer to these ‘edge’ devices. Khalifa University researchers are looking to analog computing to to support data processing at the source where the data is being generated

 

Devices at the ‘edge’ of the network – which includes Internet of Things (IoT) devices placed in homes and offices and are physically distanced from computer processing centers – produce a massive amount of data that needs to be transferred to and computed at data centers. These edge devices are pushing network bandwidth requirements to the limit. 

 

Data centers may not be able to guarantee the required response time that is critical in the real-time computing needed for various processes, such as enabling smart vehicles to navigate, for example.

 

To address this problem, a team of researchers from Khalifa University has turned to analog computing to support data processing at the source where the data is being generated.

 

They designed a novel computer processing unit that supports analog-mixed signal in-memory computing. The research team includes Dr. Dima Kilani, Postdoctoral Fellow; Dr. Baker Mohammad, Associate Professor; Dr. Yasmin Halawani, Postdoctoral Fellow; Mohammed Tolba, Research Associate; and Dr. Hani Saleh, Associate Professor, all members of KU’s System on Chip Lab (SOCL). They recently published their research in IEEE Xplore.

 

Analog computing predates electronic circuits and functions, and although it is only accurate to two or three significant digits, it was used with great effectiveness by engineers, scientists and researchers until it was made obsolete in the mid-20th century.

 

 

Additionally, as artificial intelligence applications become more popular in a growing number of industries, more computer resources, more storage, and lower power consumption are increasingly important factors. The digital processors used in AI applications today struggle to deliver, especially for the power-hungry, data-intensive machine learning models operating at the edge.

 

Analog computing could be the solution.

 

“The new era of computing involving artificial intelligence and big data, especially for edge devices, is data-intense, requiring a strict power budget, small devices, and high prices,” Dr. Mohammad explained. “This gave rise to the need for new computing platforms, known as memory-centric computing, or in-memory computing, where the idea is to eliminate data movements that have big impacts on performance and power.”

 

Unlike digital computing systems that require plenty of power, analog in-memory compute (CIM) systems process data in memory which makes memory smart just like the human brain. For applications that are computationally intensive, with large data sets that require high memory bandwidth, analog in-memory computing architectures could solve the problem of memory access bottlenecks.

 

 

The team’s novel cross-coupling capacitor—known as the C3 processing unit (C3PU)—acts as both a memory and computational element as a multiply-and-accumulate (MAC) unit.

 

“MAC units are essential building blocks for digital processing units that are used in a multitude of applications, including artificial intelligence for edge devices, signal processing, convolution, and filtering,” Dr. Kilani said. “Using in-memory computing architectures, where the MAC unit can also store data, has significant advantages in energy efficiency.”

 

Despite using significantly less energy, the C3PU device was 90 percent accurate when tested on an artificial neural network dataset. It is also much smaller than existing devices, meaning it can be implemented in numerous applications where size is a limiting factor, such as autonomous aerial vehicles, including drones. 

 

This work is the first step for in-memory and analog computing toward supporting a new era of electronics devices that support real time and approximate computing to achieve energy and performance requirements. The team plan to investigate a programmable capacitance and better timing domain computing that can improve the accuracy and support reconfigurability.

 

Jade Sterling
Science Writer
22 February 2022