GRADUATE STUDENT RESEARCH OPPORTUNITIES
Student Category-(MSc/PhD)

MSc

Project Title

Development of Next Generation Antenna Systems (KU Space Technology & Innovation Center)

Thesis Title

Low-Profile Wideband Slot Array for Ka-band Applications

Starting Semester

Fall 2020

Requirements

BSc EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

The development of wideband slot antenna element and array for satellite communications in the Ka-band.

Student Category-(MSc/PhD)

MSc

Project Title

Development of Next Generation Antenna Systems (KU Space Technology & Innovation Center)

Thesis Title

Optically Transparent Antenna for CubeSat Platforms

Starting Semester

Fall 2020

Requirements

BSc EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

The project is focused on developing efficient optically transparent antenna to be integrated with the solar panels of a CubeSat.

Student Category-(MSc/PhD)

MSc

Project Title

UHF Imaging Array

Thesis Title

COMPACT UHF NEAR-FIELD IMAGING SYSTEM

Starting Semester

Spring 2020

Requirements

BSc EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

In this project, a new Ultra-high frequency (UHF) antenna element and array for sub-wavelength imaging a developed and experimentally validated.

Student Category-(MSc/PhD)

MSc

Project Title

Flow Characterization using Dynamic Multi-Nuclei NMR Imaging

Thesis Title

METAMATERIAL-INSPIRED MULTIBAND RF COILS FOR DYNAMIC FLOW CHARACTERIZATION

Starting Semester

Spring 2020

Requirements

BSc EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

Novel Nuclear Magnetic Resonance (NMR) measurement principle is proposed for multiphase flow metering (MPFM) applications in the oil and gas industry.

Student Category-(MSc/PhD)

PhD

Project Title

Development of Next Generation Antenna Systems (KU Space Technology & Innovation Center)

Thesis Title

Novel 3D-Printed Reflectarray for Space Applications

Starting Semester

Fall 2020

Requirements

MSc EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

This project is aimed at the development of 3D-printed metallic reflectarray for Ka-band Spaceborne Antenna systems.

Student Category-(MSc/PhD)

PhD

Project Title

Flow Characterization using Dynamic Multi-Nuclei NMR Imaging

Thesis Title

SINGLE ECHO DYNAMIC FLOW PROFILE ACQUISITION

Starting Semester

Spring 2020

Requirements

MS EE

Supervisor(s)

Dr. Mohamed Abou-Khousa

Project Abstract/Summary

Novel Nuclear Magnetic Resonance (NMR) measurement principle is proposed for multiphase flow metering (MPFM) applications in the oil and gas industry.

Student Category-(MSc/PhD)

PhD

Project Title

Atrial Fibrillation Data Analysis and Validation Project

Thesis Title

Atrial Fibrillation Data Analysis and Validation Project

Starting Semester

Fall 2020 – Spring 2021

Requirements

MSc in Electrical and computer Engineering.
Very good knowledge on ML techniques.
Excellent Programming Skills

Supervisor(s)

Dr. Shihab Jimaa,
Dr. Ahsan Khandokar,
and Dr. Youssef Iraqi

Contact Info

shihab.jimaa@ku.ac.ae

Project Abstract/Summary

An investigation between Cerner Middle East and SEHA on the application of unsupervised machine learning to the SEHA electronic medical record, Malaffi, is looking at the replacement of traditional check lists for determining the risk of a patient having or developing Atrial Fibrillation (AF). AF, if untreated can increase the patient’s chances of a stroke, developing Cardio Vascular Disease (CVD) and Chronic Kidney Disease. The current checklists such as CHARGE-AF underperform for both high and low risk patients and are not based on the genomic or phenomic characteristics of the majority of SEHA patients. This investigation leads to further research that is the use of wearable to measure ECG and other vital signs (e.g. blood pressure & temperature) with sufficient clinical accuracy and veracity to be incorporated into the medical record as well as provide early warning before the onset of fibrillation. Using Malaffi data, it is possible to measure diagnoses, treatments and outcomes of the citizens of Abu Dhabi to create an automated indicator of AF risk, (Abu Dhabi AF Risk Indicator) based on ML techniques which has better specificity and sensitivity for predicting AF, considers more factors and removes any genetic bias from the earlier studies.

Student Category-(MSc/PhD)

PhD (preferred)

Project Title

Secure FPGA as a Cloud Microservice

Thesis Title

Programmable Data and Model Cryptography for AI Workloads

Starting Semester

Fall 2020

Requirements

Digital design,
applied cryptography,
machine Learning, solid communication skills.

Supervisor(s)

Prof. Ibrahim (Abe)
M. Elfadel (EECS)
Dr. Abdulhadi Shoufan (EECS)
Prof. Ernesto Damiani (EECS)

Project Abstract/Summary

The main security risks related to FPGA usage in the cloud, public or private, stem from the multi -user environment, where several users may be sharing the same physical hardware platform with the possibility of one user sniffing the bitstream file used to burn the logic design on the FPGA. Encrypting the bitstream file may be a possible defense, and high-end FPGA’s such that the 7 series from Xilinx already support such bitstream encryption using the 256-bit AES standard. In addition, the Xilinx 7 series FPGA devices have an on-chip bitstream keyed-Hash Message Authentication Code (HMAC) algorithm implemented in hardware to provide additional security beyond that provided by the AES standard alone. Aside from bitstream file sniffing, FPGAs may be subject to side-channel attacks (SCAs), which in a cloud environment, are most likely to come from an insider, especially when the cloud is private. The main goal of this project is to assess the FPGA security risks in a cloud environment and to address them in a comprehensive framework using various information security perspectives, including hardware security, cryptography, and SCA countermeasures

Student Category-(MSc/PhD)

PhD (preferred)

Project Title

Secure FPGA as a Cloud Microservice

Thesis Title

Secure FPGA Cloud Services using Programmable Hardware Security

Starting Semester

Fall 2020

Requirements

Digital design,
hardware security,
solid communication skills.

Supervisor(s)

Prof. Ibrahim (Abe)
M. Elfadel (EECS)
Dr. Abdulhadi Shoufan (EECS)
Prof. Ernesto Damiani (EECS)

Project Abstract/Summary

The main security risks related to FPGA usage in the cloud, public or private, stem from the multi-user environment, where several users may be sharing the same physical hardware platform with the possibility of one user sniffing the bitstream file used to burn the logic design on the FPGA. Encrypting the bitstream file may be a possible defense, and high-end FPGA’s such that the 7 series from Xilinx already support such bitstream encryption using the 256-bit AES standard. In addition, the Xilinx 7 series FPGA devices have an on-chip bitstream keyed-Hash Message Authentication Code (HMAC) algorithm implemented in hardware to provide additional security beyond that provided by the AES standard alone. Aside from bitstream file sniffing, FPGAs may be subject to side-channel attacks (SCAs), which in a cloud environment, are most likely to come from an insider, especially when the cloud is private. The main goal of this project is to assess the FPGA security risks in a cloud environment and to address them in a comprehensive framework using various information security perspectives, including hardware security, cryptography, and SCA countermeasures

Student Category-(MSc/PhD)

PhD (preferred)

Project Title

Innovative microwave absorption 3D meta-materials based on nanocomposite film

Thesis Title

Machine-Learning Methods for the Design of Stealth Surfaces using Radar Absorbing 3D Meta-materials

Starting Semester

Fall 2020

Requirements

Electromagnetics,
Microwaves,
Communication.
Backgorund in machine learning is a plus.

Supervisor(s)

Prof. Ibrahim (Abe)
M. Elfadel (EECS)
Dr. Daniel Choi (MME)

Project Abstract/Summary

Design, modeling, and characterization of surfaces with broadband absorption proporties in the radar frequency range. The surfaces will use 3D radar-absorbing metematerials(RAMs) that are under development at Khalifa University. The project will include full-wave electromagnetic analysis of such surfaces using 3D finite-element tools, the development and validation of braodband equivalent-circuit models of 3D RAMs, and the development of predictive models of 3D RAM EM behavior using machine-learning methods.

Student Category-(MSc/PhD)

MSc

Project Title

APEC/Theme II

Thesis Title

Novel SVPWM algorithm for Mulit level inverters

Starting Semester

Spring 2021

Requirements

Master level Power Electronics knowledge

Supervisor(s)

Dr.Balanthi Abdul R Beig

Contact Info

balanthi.beig@ku.ac.ae
050-7212075

Project Abstract/Summary

Space vector PWM is preferred for voltage source inverters. Since PWM forms the inner most block in any closed loop control system, it need to be fast. The objecitve is to develop an genralized space vector PWM algorithm which can be extended to any mube rof level and can be used for any topology. The research team headed by Dr. Balanthi Abdul R.Beig at power electronics and sustainable energy (PEASE ) research lab at KU has developed the intial ideaon this whoch need to be further developed and can be patented. Also this SVPWM can be demonstrated on a modular multi level powered drives. Low speed operation using MMC will be a added novelty.

Student Category-(MSc/PhD)

Msc

Project Title

APEC/Theme II

Thesis Title

Wireless bidirectional EV Charging ssytem

Starting Semester

Spring 2021

Requirements

UG level Control systems,
Magnetic circuits
and Master level Power Electronics knowledge

Supervisor(s)

Dr.Balanthi Abdul R Beig

Contact Info

balanthi.beig@ku.ac.ae
050-7212075

Project Abstract/Summary

Wireless charging is more convenient and preferred than plugged changing. The objective of this project is to develop wireless charging for slow charging of cars when they are parked for long time. Inductive coupling charging is mainly used, but the efficiency of the system depends on primary and secondary coil alignment, air gap length between primary and secondary coils. The tasks involve designing primary coil and secondary coil for a 5 to 7 kW bidirectional wireless charger system and associated power electronics circuit from a DC source.

Student Category-(MSc/PhD)

PhD/Msc

Project Title

APEC/Theme II

Thesis Title

Solar powered integrated Green Parking for Cities

Starting Semester

Spring 2021

Requirements

UG level Power sytems,
Master level Control systems
and Power Electronics knowledge

Supervisor(s)

Dr.Balanthi Abdul R Beig

Contact Info

balanthi.beig@ku.ac.ae
050-7212075

Project Abstract/Summary

The objective of this project is to convert the open parking spaces in Abu Dhabi city to green parking. The scope of the project includes selection of solar panels, calculating solar power generation capacity of the parking area, calculating the total demand on the system due to EVs and storage capacity required for the given parking area. Develop a program to optimize the battery capacity and maximum utilization of solar energy. Developing an energy management algorithm where batteries in EV to be used as secondary storage of power and exchanging the power between vehicle and grid. The forecast on additional load on system due to 100% EVs, additional generation capacity available due to solar generation and optimal energy storage capacity required under one substation area need to be determined. From this study the payback period need to be calculated.

Student Category-(MSc/PhD)

PhD

Project Title

Improved drive train for electric vehicles (ADEK Fudned)

Thesis Title

Efficient energy management and power conversion systems in Electric vehicles

Starting Semester

Fall 2020 OR Spring 2021

Requirements

Master level Control systems
and Master level Power Electronics knowledge

Supervisor(s)

Dr.Balanthi Abdul R Beig
& Khaled Al Jafari

Contact Info

balanthi.beig@ku.ac.ae
050-7212075

Project Abstract/Summary

The research team led by Dr.Balanthi A.R.Beig at power electronics and sustainable energy (PEASE ) research lab at KU has developed a four wheel differential drive based on open ended winding induction motor drive . Also the research team has developed a novel high gain bidirectional DC DC converter, the patent application is submitted. This research will focus on further improving this system by developing a closed loop controllers and stability analysis of the above DC-DC converter, integrating with the above open needed winding drive, developing suitable of energy management scheme to improve the drive efficiency, fault tolerant operation of the drive and regenerative breaking. A possible improvement is to use either three –level or five level inverter for intelligent selection (based on neuro-fuzzy algorithms) of the switching vector through which the inner most PWM loop of the drive will take care the charge balance of the batteries and thus improve the power management and battery performance.

Student Category-(MSc/PhD)

MSc

Project Title

Improved drive train for electric vehicles (ADEK Fudned)

Thesis Title

Closed loop controller design of high gain DC-DC converter for Electric Vehciles

Starting Semester

Fall 2020 OR Spring 2021

Requirements

UG level Control systems
and Master level Power Electronics knowledge

Supervisor(s)

Dr.Balanthi Abdul R Beig
& Khaled Al Jafari

Contact Info

balanthi.beig@ku.ac.ae
050-7212075

Project Abstract/Summary

The research team headed by Dr. Balanthi Abdul R.Beig at power electronics and sustainable energy (PEASE ) research lab at KU has developed has developed a novel high gain bidirectional DC DC converter, the patent application is submitted. The scope of this research is to develop small signal model, design closed loop controllers and stability analysis of this converter. A laboratory working prototype need to be designed and the closed loop operation of the drive under boost and buck mode operation need to be demonstrated.



RESEARCH STAFF OPPORTUNITIES
Job category-(PostDoc/RE/RA/Others)

Postdoctoral Fellow

Project Title

Secure FPGA as a Cloud Microservice

Job Summary

Play a lead technical role in multi-year, externally sponsored project on secure FPGA microservices. Design and implementation of reconfigurable post-quantum cryptographic systems for crypto as a cloud microservice. Collaborate closely with the graduate students, the faculty, and the industrial liaisons involved in this project. Contribute to IP development. Publish research results in top journal and conference venues.

Starting Date

1-Nov-20

Requirements

Expertise in FPGA digital design.
Solid knowledge of applied cryptography.
Excellent English communication skills.
Journal pubication record.

Supervisor(s)

Prof. Ibrahim (Abe) M. Elfadel (EECS)
Dr. Abdulhadi Shoufan (EECS)
Prof. Ernesto Damiani (EECS)

Project Abstract/Summary

The main security risks related to FPGA usage in the cloud, public or private, stem from the multi -user environment, where several users may be sharing the same physical hardware platform with the possibility of one user sniffing the bitstream file used to burn the logic design on the FPGA. Encrypting the bitstream file may be a possible defense, and high-end FPGA’s such that the 7 series from Xilinx already support such bitstream encryption using the 256-bit AES standard. In addition, the Xilinx 7 series FPGA devices have an on-chip bitstream keyed-Hash Message Authentication Code (HMAC) algorithm implemented in hardware to provide additional security beyond that provided by the AES standard alone. Aside from bitstream file sniffing, FPGAs may be subject to side-channel attacks (SCAs), which in a cloud environment, are most likely to come from an insider, especially when the cloud is private. The main goal of this project is to assess the FPGA security risks in a cloud environment and to address them in a comprehensive framework using various information security perspectives, including hardware security, cryptography, and SCA countermeasures

Job category-(PostDoc/RE/RA/Others)

Postdoctoal Follow

Project Title

Secure FPGA as a Cloud Microservice

Job Summary

Play a lead technical role in the initiation of a new research activity in the area of FPGA side-channel attacks and their counter-measures. Contribute to the setup of a lab and instrumentation infrastructure for the study of FPGA vulnerabilities to side-channel attacks and the development of efficient counter-meaaures. Collaborate closely with the graduate students, the faculty, and the industrial liaisons involved in the project. Contribute to IP development. Publish research results in top journal and conference venues.

Starting Date

1-Nov-20

Requirements

Expertise in FPGA digital design.
Advanced Elecrtonic lab instrumentation skills.
Familiarity with various methods of side-channel attacks.
Excellent English communication skills.
Journal pubication record.

Supervisor(s)

Prof. Ibrahim (Abe) M. Elfadel (EECS)
Dr. Abdulhadi Shoufan (EECS)
Prof. Ernesto Damiani (EECS)

Project Abstract/Summary

The main security risks related to FPGA usage in the cloud, public or private, stem from the multi-user environment, where several users may be sharing the same physical hardware platform with the possibility of one user sniffing the bitstream file used to burn the logic design on the FPGA. Encrypting the bitstream file may be a possible defense, and high-end FPGA’s such that the 7 series from Xilinx already support such bitstream encryption using the 256-bit AES standard. In addition, the Xilinx 7 series FPGA devices have an on-chip bitstream keyed-Hash Message Authentication Code (HMAC) algorithm implemented in hardware to provide additional security beyond that provided by the AES standard alone. Aside from bitstream file sniffing, FPGAs may be subject to side-channel attacks (SCAs), which in a cloud environment, are most likely to come from an insider, especially when the cloud is private. The main goal of this project is to assess the FPGA security risks in a cloud environment and to address them in a comprehensive framework using various information security perspectives, including hardware security, cryptography, and SCA countermeasures