Baker Mohammad earned his Ph.D. from the University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and his BS degree from the University of New Mexico, Albuquerque, all in ECE. Baker is the director of the System on Chip center and professor of EECS at Khalifa University. Prior to joining Khalifa University, he was a Senior Staff Engineer/Manager at Qualcomm, Austin, USA, for 6-years, where he was engaged in designing high-performance and low-power DSP processors used for communication and multi-media application. Before joining Qualcomm, he worked for 10 years at Intel Corporation on a wide range of microprocessors design from high-performance, server chips > 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). He has over 16 years of industrial experience in microprocessor design, emphasizing memory, low-power circuit, and physical design. His research interests include VLSI, power-efficient computing, high yield embedded memory, emerging technology such as Memristor, STTRAM, and In-Memory-Computing, hardware accelerators for Cyber-Physical System. He is also engaged in a microwatt range computing platform for wearable electronics and WSN focusing on energy harvesting, power management, and power conversion, including efficient dc/dc, ac/dc converters.
Baker authored/co-authored over 150 referred journals and conference proceedings, >3 books, >18 US patents, multiple invited seminars/panelists, and the presenter of >3 conference tutorials, including one tutorial on Energy Harvesting and Power management for WSN at the 2015 (ISCAS). Baker is an associate editor for IEEE Access, IEEE Transactions on VLSI (TVLSI), and Scientific Reports journals. Dr. Mohammad participates in many technical committees at IEEE conferences and reviews for TVLSI, IEEE Circuits and Systems journals.
Dr. Mohammad has received several awards, including the KUSTAR staff excellence award in intellectual property creation, IEEE TVLSI best paper award, 2016 IEEE MWSCAS Myrill B. Reed best paper award, and Qualcomm Qstar award for excellence on performance and leadership. SRC Techon best session papers for 2016 and 2017. 2009 Best paper award for Qualcomm Qtech conference and Intel Involve in the community award for volunteer and impact on the community
RISC-V-Based Secure Flight Computer System:
The goal of this project is to work with Tii (tii.ae) and international partners to develop an open RISC-V-based SoC architecture and software stack for adoption on secure application processors for drone flight computer applications to innovate in processor and platform design co-optimizing security, resilience, power efficiency and real-time performance. In addition to RISC-V processor KU designed DC-DC converters for the power management unit and Physical Uncolunable Function (PUF)
Memristor Technology Synthesis, Characterization for Sensing Applications:
I pioneered the usage of Memristor (MR) technology for sensing applications. We have results on radiation, vacuum, and Glucose sensing using MR technology. Sample publications:
S. A. Hadi, Kh. M. Humood, M. Abi Jaoude, H. Abunahla, H. F. Al Shehhi, B. Mohammad: Bipolar Cu/HfO2/p++ Si Memristors by Sol-Gel Spin Coating Method and Their Application to Environmental Sensing. Scientific Reports 12/2019; 9(1)., DOI:10.1038/s41598-019-46443-x.
H. Abunahla, B. Mohammad, A. Alazzam, M. Abi jaoudé, M. Al-Qutayri, S. F. Al-Sarawi, S Abdul Hadi: MOMSense: Metal-Oxide-Metal Elementary Glucose Sensor. Scientific Reports 04/2019; https://rdcu.be/bulWU(1)., DOI:10.1038/s41598-019-41892-w.
Humood, K., Saylan, S., Abi Jaoude, M., Mohammad, B., & Ravaux, F. (2021). Impact of vacuum on the resistive switching in HfO2-based conductive-bridge RAM with highly-doped silicon bottom electrode. Materials Science and Engineering: B, 271, 115267
RRAM Technology for Computing and Security Applications :
With CMOS technology facing challenges in continuing the exponential improvements in electronics cost, power, and speed through Moors law, searching for a replacement or complementary technology that can mitigate these challenges is of paramount importance. My research has focused on using Memristor type of Resistive RAM to achieve hyper technology with CMOS where CMOS is used for control and separation and RRAM is used for memory and in-memory computing, focusing on AI accelerators. In addition, RRAM technology has good potential for security primitive to generate random number generators.
My research in this area has been supported by grants from KU internal competitive funding and ADEC external fund.
Sample Publications:
H. Abunahla, Y. Halawani, A. Alazzam, B. Mohammad, “NeuroMem: Analog Graphene-Based Resistive Memory for Artificial Neural Networks”, Sci Rep 10, 9473 (2020). (corresponding author)
M. F. Tolba, Y. Halawani, H. Saleh, B. Mohammad, M. Al-Qutayri “FPGA-Based Memristor Emulator Circuit for Binary Convolution Networks”, IEEE access, 06/2020 (corresponding author)
Y. Halawani, B. Mohammad, M. Abu-Lebdeh, M. Al-Qutayri, S. F. Al-Sarawi: ReRAM-based In-Memory Computing for Search Engine and Neural Network Applications. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 04/2019; PP(99):1-1., DOI:10.1109/JETCAS.2019.2909317. (corresponding author)
Sample Publications:
1. H. Abunahla, Y. Halawani, A. Alazzam, and B. Mohammad, “Neuromem: Analog graphene-based resistive memory for artificial neural networks,” Scientific reports, vol. 10, no. 1, pp. 1–11, 2020. Link to the paper
2. H. Abunahla et al., “Momsense: Metal-oxide-metal elementary glucose sensor,” Scientific reports, vol. 9,no. 1, pp. 1–10, 2019. Link to the paper
3. Y. Halawani, B. Mohammad, M. A. Lebdeh, M. Al-Qutayri, and S. F. Al-Sarawi, “Reram-based in-memory computing for search engine and neural network applications,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 9, no. 2, pp. 388–397, 2019. Link to the paper
4. H. Abunahla et al., “Memsens: Memristor-based radiation sensor,” IEEE Sensors Journal, vol. 18, no. 8, pp. 3198–3205, 2018. Link to the paper
5. Y. Halawani, B. Mohammad, M. Al-Qutayri, and S. F. Al-Sarawi, “Memristor-based hardware accelerator for image compression,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26,no. 12, pp. 2749–2758, 2018. Link to the paper
6. M. A. Lebdeh, H. Abunahla, B. Mohammad, and M. Al-Qutayri, “An efficient heterogeneous memristive xnor for in-memory computing,” IEEE Transactions on Circuits and Systems I: Regular Papers,vol. 64, no. 9, pp. 2427–2437, 2017. Link to the paper
7. H. Abunahla, B. Mohammad, D. Homouz, and C. J. Okelly, “Modeling valance change memristor device: Oxide thickness, material type, and temperature effects,” IEEE Transactions on Circuits and Systems I:Regular Papers, vol. 63, no. 12, pp. 2139–2148, 2016. Link to the paper
8. M. Alhawari, B. Mohammad, H. Saleh, and M. Ismail, “An efficient zero current switching control for l-based dc–dc converters in teg applications,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 3, pp. 294–298, 2016. Link to the paper
9. M. Alhawari, T. Tekeste, B. Mohammad, H. Saleh, and M. Ismail, “Power management unit for multi-source energy harvesting in wearable electronics,” in 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), IEEE, 2016, pp. 1–4. Link to the paper
https://onlinelibrary.wiley.com/doi/full/10.1002/adfm.202305869
enhance data processing by integrating a unidirectional analogue artificial neuromorphic memristor device with a piezoelectric nanogenerator, taking inspiration from biological information processing. A self-powered unidirectional neuromorphic resistive memory device is proposed, comprising an ITO/ZnO/Yb2O3/Au structure combined with a high-sensitivity piezoelectric nanogenerator (PENG) ITO/ZnO/Al. The memristor device is operated at a voltage sweep of ±4 V with a low operating current in a range of 1.4 µA. The filament formation is studied using a conductive mode atomic force microscope. The integration enables the creation of a self-powered artificial sensing system that converts mechanical stimuli from the PENG into electrical signals, which are subsequently processed by analogue unidirectional neuromorphic device to mimic the functionality of a neuron without requiring additional circuitry. This emulation encompasses crucial functions such as potentiation, depression, and synaptic plasticity. Furthermore, this study highlights the potential for hardware implementations of neural networks with a weight change of memristor device with nonlinearity (NL) of potentiation and depression of 1.94 and 0.89, respectively, with an accuracy of 93%. The outcomes of this research contribute to the progress of next-generation low-power, self-powered unidirectional neuromorphic perception networks with correlated learning and trainable memory capabilities.
Baker has extensive experience and tracks a record of leading research projects to a successful outcome. He has been leading research in chip design focusing on efficient hardware accelerator, neuromorphic computing, power management, and RRAM technology for efficient sensing and computing applications. Baker has led multidisciplinary projects at KU with faculty from diverse backgrounds (Chemistry, Physics, ECE). His research is funded by competitive internal funding from KU and external grants from Qualcomm, the space agency, Tii, and ADEK. His ability to attract researchers, students, and colleagues to work on multi-disciplinary projects is a great asset to the team. Baker’s industrial experience (> 15 years) as a design Engineer and manager at Intel and Qualcomm prepared him to work under pressure, focus on achieving project objectives and meet strict deadlines. Baker strong technical knowledge of electronics devices and circuit design coupled with good communication, and managerial skill position him to gain research colleagues and staff respect. Baker's experience in supervising more than 15-graduate students during his KU tenure positioned him in directing students through their journey to successful outcomes.
Looking for Analog Mixed Signal researchers (all levels) or Students to work on IP blocks (PLL, High-speed interface, ADC)
